Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3732
Title: A new high-level synthesis methodology of cascaded continuous-time ΣΔ modulators
Keywords: Analog-to-digital converters
Continuous-time ΣΔ modulation
Publisher: Institute of Electrical and Electronics Engineers
Description: This brief presents an efficient method for synthesizing cascaded sigma–delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. In addition to placing the zeroes of the loop filter in an optimum way, the proposed methodology leads to more efficient architectures in terms of circuitry complexity, power consumption and robustness with respect to circuit errors.
This work was supported by the Spanish Ministry of Science and Education (with support from European Regional Development Fund) under contract TEC2004-01752/MIC.
Peer reviewed
URI: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3732
Other Identifiers: IEEE Transactions on Circuits and Systems II: Express Briefs 53(8): 739-743 (2006)
1549-7747
http://hdl.handle.net/10261/3732
10.1109/TCSII.2006.875310
Appears in Collections:Digital Csic

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