An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology

Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3825

Title:	An Embedded 12-bit 80MS/s A/D/A Interface for Power-Line Communications in 0.13μm Pure Digital CMOS Technology
Keywords:	Pipeline Analog-to-Digital Converter Current Steering Digital-to-Analog Converter Data Converters Embedded Converters
Publisher:	Institute of Electrical and Electronics Engineers
Description:	This paper presents an embedded interface, comprising both A/D and D/A converters, which has been implemented in a 0.13μm pure digital CMOS technology. The interface is integrated in a system for high-performance broad-band power-line communications. The A/D converter uses a pipelined structure, whereas the D/A stage is based on segmented current steering techniques. In both cases, specifications are 12-b resolution at 80MS/s and MTPR above 56dB. This work has been partially funded by the European MEDEA+ Office under Project MIDAS-A110. Peer reviewed
URI:	http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3825
Other Identifiers:	M. Delgado-Restituto, J. M. de la Rosa, J. Ruiz-Amaya, J.F. Bootello, L. Díez, R. del Río and A. Rodríguez-Vázquez: "An Embedded 12-bit 80-MS/s A/D/A Interface for Power-Line Communications in Pure Digital 0.13μm CMOS Technology”, Proceeding of the 2005 International Symposium on Circuits and Systems (ISCAS), pp. 4626-4629, Kobe, Japan, May 2005. 0-7803-8834-8/05 http://hdl.handle.net/10261/3825
Appears in Collections:	Digital Csic

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