Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3838
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dc.creatorRosa, José M. de la-
dc.creatorPérez-Verdú, Belén-
dc.creatorMedeiro, Fernando-
dc.creatorRío, Rocío del-
dc.creatorRodríguez-Vázquez, Ángel-
dc.date2008-04-28T16:41:11Z-
dc.date2008-04-28T16:41:11Z-
dc.date2001-08-
dc.date.accessioned2017-01-31T01:05:31Z-
dc.date.available2017-01-31T01:05:31Z-
dc.identifierJ.M. de la Rosa, B. Pérez-Verdú, F. Medeiro, R. del Río and A. Rodríguez-Vázquez, “Analysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Applications to Bandpass Sigma-Delta Modulators”. Proc. of the 15th European Conference on Circuit Theory and Design, pp. I.309-I.312, Espoo (Finland), August 2001.-
dc.identifierhttp://hdl.handle.net/10261/3838-
dc.identifier.urihttp://dspace.mediu.edu.my:8181/xmlui/handle/10261/3838-
dc.descriptionThis paper presents a precise model for the transient behaviour of Fully Differential (FD) SwItched-current (SI) memory cells placed at the front-end of high-speed A/D interfaces. This model allows us to analyze the main errors associated to the S/H process, namely: excess transfer-function delay and harmonic distortion. For the latter, the analysis is extended to BandPass ΣΔ Modulators (BP-ΣΔMs) and a closed-form expression is derived for the third-order intermodulation distortion. Time-domain simulations and experimental measurements taken from a 0.8μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach.-
dc.descriptionPeer reviewed-
dc.format185319 bytes-
dc.formatapplication/pdf-
dc.languageeng-
dc.publisherInstitute of Electrical and Electronics Engineers-
dc.rightsopenAccess-
dc.subjectSwitched-Current Circuits-
dc.subjectBandpass Sigma-Delta Modulators-
dc.titleAnalysis and Modeling of the Non-Linear Sampling Process in Switched-Current Circuits - Application to Bandpass Sigma-Delta Modulators-
dc.typeArtículo-
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