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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3841| Title: | A 14-bit 4-MS/s Multi-bit Cascade Sigma-Delta Modulator in CMOS 0.35-um Digital Technology |
| Keywords: | Analog-to-Digital Converters Sigma-Delta Modulators |
| Description: | This paper presents a 4th-order 3-stage cascade SD modulator that achieves 14-bit dynamic range at 4MS/s using low oversampling ratio. It includes a programmable multi-bit quantizer in the last stage, providing 2-, 3-, or 4-bit internal resolution. The modulator is implemented with fully-differential switched capacitor circuits in a CMOS 0.35-um digital
technology. The estimated power consumption is
78mW, from a 3.3-V supply. This work has been partially supported by the ESPRIT Project 29261 and the CICYT Project TIC 97-0580. Peer reviewed |
| URI: | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3841 |
| Other Identifiers: | In "CMOS 0.35-um Digital Technology Multi-Bit Cascade Sigma-Delta Modulator in CMOS 0.35μm Digital Technology”. Proc. of the XV Design of Circuits and Integrated Systems Conference, pp. 133-138, Montpellier (France), November 2000. http://hdl.handle.net/10261/3841 |
| Appears in Collections: | Digital Csic |
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