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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3843Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.creator | Ruiz Amaya, Jesús | - |
| dc.creator | Rosa, José M. de la | - |
| dc.creator | Delgado-Restituto, Manuel | - |
| dc.date | 2008-04-29T05:41:23Z | - |
| dc.date | 2008-04-29T05:41:23Z | - |
| dc.date | 2004-11 | - |
| dc.date.accessioned | 2017-01-31T01:05:38Z | - |
| dc.date.available | 2017-01-31T01:05:38Z | - |
| dc.identifier | J. Ruiz-Amaya, J.M. de la Rosa and M. Delgado-Restituto: "Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters", Proceeding of the 2004 Conference on Design of Circuits and Integrated Systems, pp. 39-44, Bordeaux, November 2004. | - |
| dc.identifier | 2-9522971-0-X | - |
| dc.identifier | http://hdl.handle.net/10261/3843 | - |
| dc.identifier.uri | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3843 | - |
| dc.description | This paper presents a toolbox for the time-domain simulation and optimization-based high-level synthesis of pipeline analog-to-digital converters in MATLAB®. Behavioral models of building blocks, including their critical error mechanisms, are described and incorporated into SIMULINK® as C-compiled S-functions. This approach significantly speeds up system-level simulations while keeping high accuracy −verified with HSPICE− and interoperability of different subcircuit models. Moreover, their combined use with an efficient optimizer makes the proposed toolbox a valuable alternative for the design of broadband communication analog front-ends. As a case study, an embedded 0.13μm CMOS 12bit@80MS/s ADC for a PLC chipset is designed to show the capabilities of the presented tool. | - |
| dc.description | This work has been supported by the MEDEA+ (A110 MIDAS) Project. | - |
| dc.description | Peer reviewed | - |
| dc.format | 600492 bytes | - |
| dc.format | application/pdf | - |
| dc.language | eng | - |
| dc.rights | openAccess | - |
| dc.subject | Pipeline Analog-to-Digital Converters | - |
| dc.subject | High-level Synthesis | - |
| dc.title | Simulation-based High-level Synthesis of Pipeline Analog-to-Digital Converters | - |
| dc.type | Artículo | - |
| Appears in Collections: | Digital Csic | |
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