Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3849
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dc.creatorMorgado, Alonso-
dc.creatorRío, Rocío del-
dc.creatorRosa, José M. de la-
dc.creatorMedeiro, Fernando-
dc.creatorPérez-Verdú, Belén-
dc.creatorRodríguez-Vázquez, Ángel-
dc.date2008-04-29T06:04:33Z-
dc.date2008-04-29T06:04:33Z-
dc.date2005-11-
dc.date.accessioned2017-01-31T01:05:51Z-
dc.date.available2017-01-31T01:05:51Z-
dc.identifierA. Morgado, R. del Río, J.M. de la Rosa, F. Medeiro, B. Pérez-Verdú, F.V. Fernández and A. Rodríguez-Vázquez: "Design Considerations for Multistandard Cascade ΣΔ Modulators", Proceeding of the 2005 Conference on Design of Circuits and Integrated Systems, Lisbon, November 2005.-
dc.identifierhttp://hdl.handle.net/10261/3849-
dc.identifier.urihttp://dspace.mediu.edu.my:8181/xmlui/handle/10261/3849-
dc.descriptionThis paper discusses design considerations for cascade Sigma-Delta Modulators (ΣΔMs) included in multistandard wireless receivers. Four different standards are covered: GSM, Bluetooth, UMTS, and WLAN. A top-down design methodology is proposed to find out the optimum modulator architecture in terms of circuit complexity and reconfiguration parameters. Several reconfiguration strategies are adopted at both architecture- and circuit-level in order to adapt the modulator performance to the different standards requirements with adaptive power consumption. Time-domain behavioural simulations considering a 0.13μm CMOS implementation are shown to validate the presented approach.-
dc.descriptionThis work has been supported by the Spanish Ministry of Science and Education (with support from the European Regional Development Fund) under contract TEC2004-01752/MIC.-
dc.descriptionPeer reviewed-
dc.format817658 bytes-
dc.formatapplication/pdf-
dc.languageeng-
dc.rightsopenAccess-
dc.subjectSigma-Delta A/D Converters-
dc.subjectMulti-Standard Applications-
dc.titleDesign Considerations for Multistandard Cascade ΣΔ Modulators-
dc.typeArtículo-
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