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http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3852Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.creator | Río, Rocío del | - |
| dc.creator | Rosa, José M. de la | - |
| dc.creator | Pérez-Verdú, Belén | - |
| dc.creator | Medeiro, Fernando | - |
| dc.creator | Rodríguez-Vázquez, Ángel | - |
| dc.date | 2008-04-29T06:35:22Z | - |
| dc.date | 2008-04-29T06:35:22Z | - |
| dc.date | 1999 | - |
| dc.date.accessioned | 2017-01-31T01:05:54Z | - |
| dc.date.available | 2017-01-31T01:05:54Z | - |
| dc.identifier | Proceedings of the XIV Design of Circuits and Integrated Systems Conference: 727-732 (1999) | - |
| dc.identifier | http://hdl.handle.net/10261/3852 | - |
| dc.identifier.uri | http://dspace.mediu.edu.my:8181/xmlui/handle/10261/3852 | - |
| dc.description | Comunicación presentada al "XIV Design of Circuits and Integrated Systems Conference" celebrado en Palma de Mallorca (Spain) en Noviembre de 1999. | - |
| dc.description | This paper presents a detailed study on the transient response of SC integrators taking into account the effects of amplifier finite gain-bandwidth product and slew-rate during, unlike previous models, both the integration and sampling phases. Results are applied to the design of high-speed low-power ΣΔ modulators and simplified equations are obtained for manual-estimation of the settling error power. | - |
| dc.description | This work has been partially supported by the ESPRIT Project 29261 and the CICYT Project TIC 97-0580. | - |
| dc.description | Peer reviewed | - |
| dc.format | 101890 bytes | - |
| dc.format | application/pdf | - |
| dc.language | eng | - |
| dc.rights | openAccess | - |
| dc.subject | Switched-capacitor circuits | - |
| dc.subject | Σ-Δ modulators | - |
| dc.title | Reliable analysis of settling errors in SC integrators - application to high-speed low-power ΣΔ modulators design | - |
| dc.type | Comunicación de congreso | - |
| Appears in Collections: | Digital Csic | |
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