Proposed Instructions on the GE 635 for List Processing and Push Down Stacks

Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/6114

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DC Field	Value	Language
dc.creator	Levin, Michael	-
dc.date	2004-10-04T14:39:53Z	-
dc.date	2004-10-04T14:39:53Z	-
dc.date	1964-09-01	-
dc.date.accessioned	2013-10-09T02:43:04Z	-
dc.date.available	2013-10-09T02:43:04Z	-
dc.date.issued	2013-10-09	-
dc.identifier	AIM-072	-
dc.identifier	http://hdl.handle.net/1721.1/6114	-
dc.identifier.uri	http://koha.mediu.edu.my:8181/xmlui/handle/1721	-
dc.description	The instructions that transmit data between the index registers and the memory work only on the left half (address) portion of memory. These instructions are LDXn (load index n from address of storage word). And STXn (store the contents of index n in address of storage word). The effective address of both of these instructions includes modification by index registers. A corresponding set of instructions for transmitting data to or from the right half of memory would facilitate list structure operations. The present order code makes it impossible to so list-chaining operations (car or cdr) without disturbing the A or Q registers.	-
dc.format	1162914 bytes	-
dc.format	88986 bytes	-
dc.format	application/postscript	-
dc.format	application/pdf	-
dc.language	en_US	-
dc.relation	AIM-072	-
dc.title	Proposed Instructions on the GE 635 for List Processing and Push Down Stacks	-
Appears in Collections:	MIT Items

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