A Comparison of Hardware Implementations for Low-Level Vision Algorithms

Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/6521

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DC Field	Value	Language
dc.creator	Gamble, Ed	-
dc.date	2004-10-04T15:14:34Z	-
dc.date	2004-10-04T15:14:34Z	-
dc.date	1989-11-01	-
dc.date.accessioned	2013-10-09T02:45:54Z	-
dc.date.available	2013-10-09T02:45:54Z	-
dc.date.issued	2013-10-09	-
dc.identifier	AIM-1173	-
dc.identifier	http://hdl.handle.net/1721.1/6521	-
dc.identifier.uri	http://koha.mediu.edu.my:8181/xmlui/handle/1721	-
dc.description	Early and intermediate vision algorithms, such as smoothing and discontinuity detection, are often implemented on general-purpose serial, and more recently, parallel computers. Special-purpose hardware implementations of low-level vision algorithms may be needed to achieve real-time processing. This memo reviews and analyzes some hardware implementations of low-level vision algorithms. Two types of hardware implementations are considered: the digital signal processing chips of Ruetz (and Broderson) and the analog VLSI circuits of Carver Mead. The advantages and disadvantages of these two approaches for producing a general, real-time vision system are considered.	-
dc.format	5442007 bytes	-
dc.format	2098467 bytes	-
dc.format	application/postscript	-
dc.format	application/pdf	-
dc.language	en_US	-
dc.relation	AIM-1173	-
dc.title	A Comparison of Hardware Implementations for Low-Level Vision Algorithms	-
Appears in Collections:	MIT Items

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