Robust, High-Speed Network Design for Large-Scale Multiprocessing

Please use this identifier to cite or link to this item: http://dspace.mediu.edu.my:8181/xmlui/handle/1721.1/6790

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DC Field	Value	Language
dc.creator	DeHon, Andre	-
dc.date	2004-10-20T19:55:06Z	-
dc.date	2004-10-20T19:55:06Z	-
dc.date	1993-09-01	-
dc.date.accessioned	2013-10-09T02:46:55Z	-
dc.date.available	2013-10-09T02:46:55Z	-
dc.date.issued	2013-10-09	-
dc.identifier	AITR-1445	-
dc.identifier	http://hdl.handle.net/1721.1/6790	-
dc.identifier.uri	http://koha.mediu.edu.my:8181/xmlui/handle/1721	-
dc.description	As multiprocessor system size scales upward, two important aspects of multiprocessor systems will generally get worse rather than better: (1) interprocessor communication latency will increase and (2) the probability that some component in the system will fail will increase. These problems can prevent us from realizing the potential benefits of large-scale multiprocessing. In this report we consider the problem of designing networks which simultaneously minimize communication latency while maximizing fault tolerance. Using a synergy of techniques including connection topologies, routing protocols, signalling techniques, and packaging technologies we assemble integrated, system-level solutions to this network design problem.	-
dc.format	205 p.	-
dc.format	1915331 bytes	-
dc.format	10054055 bytes	-
dc.format	application/octet-stream	-
dc.format	application/pdf	-
dc.language	en_US	-
dc.relation	AITR-1445	-
dc.subject	fault tolerance	-
dc.subject	multipath	-
dc.subject	network	-
dc.subject	latency	-
dc.subject	smultiprocessing	-
dc.subject	transit	-
dc.title	Robust, High-Speed Network Design for Large-Scale Multiprocessing	-
Appears in Collections:	MIT Items

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