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Full utilization, fairness and bounded access delay on high speed bus networks

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dc.contributor Chiu, Angela Lan.
dc.contributor Gallager, Robert G.
dc.contributor Massachusetts Institute of Technology. Laboratory for Information and Decision Systems.
dc.date 2003-04-29T15:41:55Z
dc.date 2003-04-29T15:41:55Z
dc.date 1996
dc.date.accessioned 2013-06-04T16:17:18Z
dc.date.available 2013-06-04T16:17:18Z
dc.date.issued 2013-06-05
dc.identifier http://hdl.handle.net/1721.1/3418
dc.identifier.uri http://koha.mediu.edu.my:8181/xmlui/handle/1721
dc.description Angela L. Chiu, Robert G. Gallager.
dc.description Caption title.
dc.description Includes bibliographical references (p. 31-32).
dc.description Supported by ARPA. MDA972-92-J-1038
dc.format 35 p.
dc.format 1740790 bytes
dc.format application/pdf
dc.language eng
dc.publisher Massachusetts Institute of Technology, Laboratory for Information and Decision Systems
dc.relation LIDS-P ; 2321
dc.subject TK7855.M41 E3845 no.2321
dc.title Full utilization, fairness and bounded access delay on high speed bus networks


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