| dc.creator |
Daniel, Luca |
|
| dc.creator |
Ong, Chin Siong |
|
| dc.creator |
Low, Sok Chay |
|
| dc.creator |
Lee, Kwok Hong |
|
| dc.creator |
White, Jacob K. |
|
| dc.date |
2003-11-17T17:32:57Z |
|
| dc.date |
2003-11-17T17:32:57Z |
|
| dc.date |
2003-01 |
|
| dc.date.accessioned |
2013-10-09T02:32:04Z |
|
| dc.date.available |
2013-10-09T02:32:04Z |
|
| dc.date.issued |
2013-10-09 |
|
| dc.identifier |
http://hdl.handle.net/1721.1/3703 |
|
| dc.identifier.uri |
http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
|
| dc.description |
In this paper we describe an approach for generating geometrically-parameterized integrated-circuit interconnect models that are efficient enough for use in interconnect synthesis. The model generation approach presented is automatic, and is based on a multi-parameter model-reduction algorithm. The effectiveness of the technique is tested using a multi-line bus example, where both wire spacing and wire width are considered as geometric parameters. Experimental results demonstrate that the generated models accurately predict both delay and cross-talk effects over a wide range of spacing and width variation. |
|
| dc.description |
Singapore-MIT Alliance (SMA) |
|
| dc.format |
385494 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
en_US |
|
| dc.relation |
High Performance Computation for Engineered Systems (HPCES); |
|
| dc.subject |
model reduction |
|
| dc.subject |
moment matching |
|
| dc.subject |
interconnect analysis |
|
| dc.title |
Multiparameter Moment Matching Model Reduction Approach for Generating Geometrically Parameterized Interconnect Performance Models |
|
| dc.type |
Article |
|