| dc.creator |
Choi, D. |
|
| dc.creator |
Shinavski, R.J. |
|
| dc.creator |
Spearing, S. Mark |
|
| dc.date |
2003-12-22T20:42:28Z |
|
| dc.date |
2003-12-22T20:42:28Z |
|
| dc.date |
2002-01 |
|
| dc.date.accessioned |
2013-10-09T02:33:25Z |
|
| dc.date.available |
2013-10-09T02:33:25Z |
|
| dc.date.issued |
2013-10-09 |
|
| dc.identifier |
http://hdl.handle.net/1721.1/3983 |
|
| dc.identifier.uri |
http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
|
| dc.description |
MEMS-based gas turbine engines are currently under development at MIT for use as a button-sized portable power generator or micro-aircraft propulsion sources. Power densities expected for the micro-engines require very high rotor peripheral speeds of 300-600m/s and high combustion gas temperatures of 1300-1700K. These harsh requirements for the engine operation induce very high stress levels in the engine structure, and thus call for qualified refractory materials with high strength. Silicon carbide (SiC) has been chosen as the most promising material for use due to its high strength and chemical inertness at elevated temperatures. However, the state-of-the art microfabrication techniques for single-crystal SiC are not yet mature enough to achieve the required level of high precision of micro-engine components. To circumvent this limitation and to take advantage of the well-established precise silicon microfabrication technologies, silicon-silicon carbide hybrid turbine structures are being developed using chemical vapor deposition (CVD) of thick SiC (up to ~70µm) on silicon wafers and wafer bonding processes. Residual stress control of thick SiC layers is of critical importance to all the silicon-silicon carbide hybrid structure fabrication steps since a high level of residual stresses causes wafer cracking during the planarization, as well as excessive wafer bow, which is detrimental to the subsequent planarization and bonding processes. The origins of the residual stress in CVD SiC layers have been studied. SiC layers (as thick as 30µm) with low residual stresses (on the order of several tens of MPa) have been produced by controlling CVD process parameters such as temperature and gas ratio. Wafer-level SiC planarization has been accomplished by mechanical polishing using diamond grit and bonding processes are currently under development using CVD silicon dioxide as an interlayer material. This paper reports on the work that has been done so far under the MIT micro-engine project. |
|
| dc.description |
Singapore-MIT Alliance (SMA) |
|
| dc.format |
1354372 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
en_US |
|
| dc.relation |
Advanced Materials for Micro- and Nano-Systems (AMMNS); |
|
| dc.subject |
CVD silicon carbide |
|
| dc.subject |
residual stress |
|
| dc.subject |
power-MEMS |
|
| dc.subject |
micro-engine |
|
| dc.subject |
microfabrication |
|
| dc.subject |
microstructure |
|
| dc.title |
Process development of silicon-silicon carbide hybrid structures for micro-engines (January 2002) |
|
| dc.type |
Article |
|