| dc.contributor |
Silveira, Luís Miguel. |
|
| dc.date |
2004-03-02T18:28:20Z |
|
| dc.date |
2004-03-02T18:28:20Z |
|
| dc.date |
1995 |
|
| dc.date.accessioned |
2013-10-09T02:34:19Z |
|
| dc.date.available |
2013-10-09T02:34:19Z |
|
| dc.date.issued |
2013-10-09 |
|
| dc.identifier |
no. 592 |
|
| dc.identifier |
http://hdl.handle.net/1721.1/4161 |
|
| dc.identifier.uri |
http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
|
| dc.description |
Luis Miguel Silveira. |
|
| dc.description |
Includes bibliographical references (p. 156-160). |
|
| dc.description |
Supported in part by the Semiconductor Research Corporation. SRC 93-SJ-558 Supported in part by the National Science Foundation / Advanced Research Projects Agency. MIP 91-17724 |
|
| dc.format |
162 p. |
|
| dc.format |
9372346 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
eng |
|
| dc.publisher |
Research Laboratory of Electronics, Massachusetts Institute of Technology |
|
| dc.relation |
Technical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 592. |
|
| dc.subject |
TK7855.M41 R43 no.592 |
|
| dc.title |
Model order reduction techniques for circuit simulation |
|