| dc.contributor |
Armstrong, Robert Clyde. |
|
| dc.date |
2004-03-02T18:52:17Z |
|
| dc.date |
2004-03-02T18:52:17Z |
|
| dc.date |
1985 |
|
| dc.date.accessioned |
2013-10-09T02:34:33Z |
|
| dc.date.available |
2013-10-09T02:34:33Z |
|
| dc.date.issued |
2013-10-09 |
|
| dc.identifier |
no 508 |
|
| dc.identifier |
http://hdl.handle.net/1721.1/4235 |
|
| dc.identifier.uri |
http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
|
| dc.description |
Robert Clyde Armstrong. |
|
| dc.description |
Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985. |
|
| dc.description |
Bibliography: leaf 116. |
|
| dc.description |
Supported in part by the U.S. Air Force Office of Scientific Research contract F49620-84-C-0004 |
|
| dc.format |
116 p. |
|
| dc.format |
6588811 bytes |
|
| dc.format |
application/pdf |
|
| dc.language |
eng |
|
| dc.publisher |
Massachusetts Institute of Technology, Research Laboratory of Electronics |
|
| dc.relation |
Technical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 508. |
|
| dc.subject |
TK7855.M41 R43 no.508 |
|
| dc.title |
Procedural layout of a high-speed floating-point arithmetic unit |
|