| dc.creator |
Sussman, Gerald Jay |
|
| dc.creator |
Stallman, Richard Matthew |
|
| dc.date |
2004-10-01T20:37:30Z |
|
| dc.date |
2004-10-01T20:37:30Z |
|
| dc.date |
1975-03-01 |
|
| dc.date.accessioned |
2013-10-09T02:41:23Z |
|
| dc.date.available |
2013-10-09T02:41:23Z |
|
| dc.date.issued |
2013-10-09 |
|
| dc.identifier |
AIM-328 |
|
| dc.identifier |
http://hdl.handle.net/1721.1/5803 |
|
| dc.identifier.uri |
http://koha.mediu.edu.my:8181/xmlui/handle/1721 |
|
| dc.description |
We present EL, a new kind of circuit analysis program. Whereas other circuit analysis systems rely on classical, formal analysis techniques, EL employs heuristic "inspection" methods to solve rather complex DC bias circuits. These techniques also give EL the ability to explain any result in terms of its own qualitative reasoning processes. EL's reasoning is based on the concept of a "local one-step deduction" augmented by various "teleological" principles and by the concept of a "macro-element". We present several annotated examples of EL in operation and an explanation of how it works. We also show how EL can be extended in several directions, including sinusoidal steady state analysis. Finally, we touch on possible implications for engineering education. We feel that EL is significant not only as a novel approach to circuit analysis but also as an application of Artificial Intelligence techniques to a new and interesting domain. |
|
| dc.format |
28 p. |
|
| dc.format |
1902299 bytes |
|
| dc.format |
1360617 bytes |
|
| dc.format |
application/postscript |
|
| dc.format |
application/pdf |
|
| dc.language |
en_US |
|
| dc.relation |
AIM-328 |
|
| dc.title |
Heuristic Techniques in Computer Aided Circuit Analysis |
|