Graduation date: 2007Digital-to-analog converters (DACs) with wide dynamic range and high linearity are required for high-end audio applications. A multi-bit delta sigma audio DAC, using a novel gain-correction technique, is described in this thesis. For widely varying on-chip RC time constant, the DAC gain can be accurately controlled by the correction circuitry. To overcome the nonlinearity caused by the mismatches of the internal unit-element DAC, a new dynamic element matching (DEM) algorithm, named split-set data-weighted averaging (SDWA), is proposed. In-band tones can be effectively removed by the proposed algorithm while signalto- noise ratio (SNR) is high. Hardware implementation of SDWA is cost-effective and low-latency which makes it practical in high speed applications. A headphone driver integrated together with the analog reconstruction filter in the delta sigma audio DAC allows the designed DAC to driver the headphone directly. An experimental headphone driver was designed and fabricated in a 0.35mm CMOS technology. The prototype delta sigma audio DAC integrated with the headphone driver was built using the same technology. Simulation and measured results show that they both meet the requirements for a typical high-end audio system.